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8302401ZA中文资料

1324

8675

V CC

GND

V OUT Hermetically Sealed, Low I F ,Wide V CC , High Gain Optocouplers Technical Data

Features

? Dual Marked with Device Part Number and DSCC Drawing Number

? Manufactured and Tested on a MIL-PRF-38534 Certified Line

? QML-38534, Class H and K ? Five Hermetically Sealed Package Configurations ? Performance Guaranteed,Over -55°C to +125°C ? Low Input Current Requirement: 0.5 mA ? High Current Transfer Ratio: 1500% Typical @I F =0.5 mA

? Low Output Saturation Voltage: 0.11 V Typical ? 1500 Vdc Withstand Test Voltage

? High Radiation Immunity ? 6N138/9, HCPL-2730/31Function Compatibility ? Reliability Data

Applications

? Military and Space

? High Reliability Systems ? Telephone Ring Detection ? Microprocessor System Interface

? Transportation, Medical, and Life Critical Systems

? Isolated Input Line Receiver ? EIA RS-232-C Line Receiver ? Voltage Level Shifting

? Isolated Input Line Receiver ? Isolated Output Line Driver ? Logic Ground Isolation

? Harsh Industrial Environments ? Current Loop Receiver ? System Test Equipment Isolation

? Process Control

Input/Output Isolation

Description

These units are single, dual, and quad channel, hermetically sealed optocouplers. The products are capable of operation and storage over the full military temperature range and can be purchased as either standard product or with full MIL-PRF-38534 Class Level H or K testing or from the appro-priate DSCC Drawing. All devices are manufactured and tested on a MIL-PRF-38534 certified line and are included in the DSCC Quali-fied Manufacturers List QML-38534 for Hybrid Microcircuits.Each channel contains a GaAsP light emitting diode which is

optically coupled to an integrated high gain photon detector. The high gain output stage features an open collector output providing

both lower saturation voltage and higher signaling speed than

possible with conventional photo-Darlington optocouplers. The shallow depth and small junctions offered by the IC process provides better radiation immunity than conventional photo transistor optocouplers.The supply voltage can be

operated as low as 2.0 V without adversely affecting the parametric performance.

Functional Diagram

Multiple Channel Devices Available

Truth Table

(Positive Logic)

Input Output On (H)L Off (L)

CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.

*See matrix for available extensions.

5962-89810HCPL-573X HCPL-673X 5962-897855962-98002

6N140A*HCPL-675X 83024

HCPL-570X HCPL-177K The connection of a 0.1 μF bypass capacitor between V CC and GND is recommended.

These devices have a 300% minimum CTR at an input current of only 0.5 mA making them ideal for use in low input current applications such as MOS, CMOS, low power logic interfaces or line receivers. Compatibility with high voltage CMOS logic systems is assured by specifying I CCH and

I OH at 18 Volts.

Upon special request, the follow-ing device selections can be made: CTR minimum of up to 600% at 0.5 mA, and lower output leakage current levels to 100 μA.Package styles for these parts are

8 and 16 pin DIP through hole

(case outlines P and E respec-

tively), 16 pin DIP flat pack (case

outline F), and leadless ceramic

chip carrier (case outline 2).

Devices may be purchased with a

variety of lead bend and plating

options. See Selection Guide

table for details. Standard

Military Drawing (SMD) parts are

available for each package and

lead style.

Because the same electrical die

(emitters and detectors) are used

for each channel of each device

listed in this data sheet, absolute

maximum ratings, recommended

operating conditions, electrical

specifications, and performance

characteristics shown in the

figures are similar for all parts

except as noted. Additionally, the

same package assembly processes

and materials are used in all

devices. These similarities justify

the use of a common data base

for die related reliability and

certain limited radiation test

results.

Selection Guide-Package Styles and Lead Configuration Options

16 pin20 Pad

Package16 pin DIP8 pin DIP8 pin DIP Flat Pack LCCC Lead Style Through Hole Through Hole Through Hole Unformed Leads Surface Mount Channels41242 Common Channel Wiring V CC, GND None V CC, GND V CC, GND None Agilent Part # & Options

Commercial6N140A*HCPL-5700HCPL-5730HCPL-6750HCPL-6730 MIL-PRF-38534 Class H6N140A/883B HCPL-5701HCPL-5731HCPL-6751HCPL-6731 MIL-PRF-38534 Class K HCPL-177K HCPL-570K HCPL-573K HCPL-675K HCPL-673K Standard Lead Finish Gold Plate Gold Plate Gold Plate Gold Plate Solder Pads Solder Dipped Option#200Option#200Option#200

Butt Cut/Gold Plate Option#100Option#100Option#100

Gull Wing/Soldered Option#300Option#300Option#300

Crew Cut/Gold Plate Option#600Option#600Option#600

Class H SMD Part #

Prescript for all below None5962-5962-None5962-Either Gold or Solder8302401EX8981001PX8978501PX8302401FX89785022X Gold Plate8302401EC8981001PC8978501PC8302401FC

Solder Dipped8302401EA8981001PA8978501PA89785022A Butt Cut/Gold Plate8302401YC8981001YC8978501YC

Butt Cut/Soldered8302401YA8981001YA8978501YA

Gull Wing/Soldered8302401XA8981001XA8978501ZA

Crew Cut/Gold Plate8302401ZC Available Available

Crew Cut/Soldered8302401ZA Available Available

Class K SMD Part #

Prescript for all below5962-5962-5962-5962-5962-Either Gold or Solder9800201KEX8981002KPX8978503KPX9800201KFX8978504K2X Gold Plate9800201KEC8981002KPC8978503KPC9800201KFC

Solder Dipped9800201KEA8981002KPA8978503KPA8978504K2A Butt Cut/Gold Plate9800201KYC8981002KYC8978503KYC

Butt Cut/Soldered9800201KYA8981002KYA8978503KYA

Gull Wing/Soldered9800201KXA8981002KXA8978503KZA

Crew Cut/Gold Plate9800201KZC Available Available

Crew Cut/Soldered9800201KZA Available Available

*JEDEC registered part.

Functional Diagrams

Note: All DIP and flat pack devices have common V CC and ground. LCCC (leadless ceramic chip carrier) package has isolated channels with separate V CC and ground connections.

Outline Drawings

16 Pin DIP Through Hole, 4 Channels

Leadless Device Marking

Leaded Device Marking

NOTE: DIMENSIONS IN MILLIMETERS (INCHES).

Agilent DESIGNATOR

Agilent P/N DSCC SMD* DSCC SMD* PIN ONE/ ESD IDENT

*QUALIFIED PARTS ONLY *QUALIFIED PARTS ONLY

Outline Drawings (continued)

16 Pin Flat Pack, 4 Channels

20 Terminal LCCC Surface Mount, 2 Channels

8 Pin DIP Through Hole, 1 and 2 Channel

0.46 (0.018) 0.36 (0.014)

0.23 (0.009)

NOTE: DIMENSIONS IN MILLIMETERS (INCHES).

NOTE: DIMENSIONS IN MILLIMETERS (INCHES). SOLDER THICKNESS 0.127 (0.005) MAX.

NOTE: DIMENSIONS IN MILLIMETERS (INCHES).

Hermetic Optocoupler Options

Absolute Maximum Ratings

Storage Temperature Range, T S ..................................-65°C to +150°C Operating Temperature, T A .........................................-55°C to +125°C Case Temperature, T C ...............................................................+170°C Junction Temperature, T J .........................................................+175°C Lead Solder Temperature ................................................260°C for 10s Output Current, I O (Each Channel)..............................................40 mA Output Voltage, V O (Each Channel).................................-0.5 to 20 V [1]Supply Voltage, V CC ..........................................................-0.5 to 20 V [1]Output Power Dissipation (Each Channel).............................50 mW [2]Peak Input Current (Each Channel, <1 ms Duration).................20 mA Average Input Current, I F (Each Channel)...............................10 mA [3]Reverse Input Voltage, V R (Each Channel).........................................5V Package Power Dissipation, P D (each channel)........................200 mW

ESD Classification

(MIL-STD-883, Method 3015)

HCPL-5700/01/0K and 6730/31/3K..................................(??), Class 26N140A, 6N140A/883B, HCPL-177K,

HCPL-6750/51/5K and HCPL-5730/31/3K................(Dot), Class 3

Recommended Operating Conditions

Parameter

Symbol Min.Max.Units Input Voltage, Low Level (Each Channel)V F(OFF) 0.8 V Input Current, High Level (Each Channel)I F(ON)0.55mA Supply Voltage V CC 2.018V Output Voltage

V O

2.0

ANODE

CATHODE

V V O

GND

8 Pin Ceramic DIP Single Channel Schematic

Electrical Characteristics,T

=-55°C to +125°C, unless otherwise specified

*For JEDEC registered parts.

**All typical values are at V CC = 5 V, T A = 25°C.

Electrical Characteristics(cont)T

=-55°C to +125°C, unless otherwise specified

*For JEDEC registered parts.

**All typical values are at V CC=5 V, T A=25°C.

Typical Characteristics, T

=25°C, V CC=5V

Parameter Sym.Typ.Units Test Conditions Note Input Capacitance C IN60pF V F=0V, f=1 MHz4 Input Diode Temperature?V F/?T A-1.8mV/°C I F=1.6 mA4 Coefficient

Resistance (Input-Output)R I-O1012?V I-O=500 V4, 8 Capacitance (Input-Output)C I-O 2.0pF f=1MHz4, 8 Dual and Quad Channel Product Only

Input-Input Leakage Current I I-I0.5nA Relative Humidity=45%,9

V I-I=500 V, t=5 s

Resistance (Input-Input)R I-I1012?V I-I=500 V9 Capacitance (Input-Input)C I-I 1.0pF f=1 MHz9

Notes:

1. GND Pin should be the most negative

voltage at the detector side. Keeping

V CC as low as possible, but greater

than 2.0 V, will provide lowest total

I OH over temperature.

2. Output power is collector output

power plus total supply power for the

single channel device. For the dual

channel device, output power is

collector output power plus one half

the total supply power. For the quad

channel device, output power is

collector output power plus one

fourth of total supply power. Derate

at 1.66 mW/°C above 110°C.

3. Derate I F at 0.33 mA/°C above 110°C.

4. Each channel.

5. CURRENT TRANSFER RATIO is

defined as the ratio of output

collector current, I O, to the forward

LED input current, I F, times 100%. 6. I OHX is the leakage current resulting

from channel to channel optical

crosstalk. I F=2 μA for channel under test. For all other channels,

I F=10mA.

7. All devices are considered two-

terminal devices; measured between

all input leads or terminals shorted

together and all output leads or

terminals shorted together.

8. Measured between each input pair

shorted together and all output

connections for that channel shorted

together.

9. Measured between adjacent input

pairs shorted together for each multi-

channel device.

10. CM L is the maximum rate of rise of

the common mode voltage that can be

sustained with the output voltage in

the logic low state (V O<0.8 V). CM H

is the maximum rate of fall of the

common mode voltage that can be

sustained with the output voltage in

the logic high state (V O> 2.0 V).

11. In applications where dV/dt may

exceed 50,000 V/μs (such as a static

discharge) a series resistor, R CC,

should be included to protect the

detector ICs from destructively high

surge currents. The recommended

value is:

1 (V)

R CC=——––––––– k?

0.15 I F (mA)

for single channel;

1 (V)

R CC=——––––––– k?

0.3 I F (mA)

for dual channel;

1 (V)

R CC=—–––––—–– k?

0.6 I F (mA)

for quad channel.

12. This is a momentary withstand test,

not an operating condition.

13. Standard parts receive 100% testing

at 25°C (Subgroups 1 and 9). SMD

and 883B parts receive 100% testing

at 25,125, and -55°C (Subgroups 1

and 9, 2 and 10, 3 and 11,

respectively).

14. Parameters tested as part of device

initial characterization and after

design and process changes.

Parameters guaranteed to limits

specified for all lots not specifically

tested.

15. The HCPL-6730, HCPL-6731, and

HCPL-673K dual channel parts

function as two independent single

channel units. Use the single channel

parameter limits.

16. Not required for 6N140A, 6N140A/

883B, HCPL-177K, HCPL-6750/51/

5K, 8302401, and 5962-9800201

types.

17. Required for 6N140A, 6N140A/883B,

HCPL-177K, HCPL-6750/51/5K,

8302401, and 5962-9800201 types.

Figure 2. Normalized DC Transfer Characteristics.

Figure 3. Normalized Current Transfer Ratio vs. Input Diode Forward Current.

Figure 8. Switching Test Circuit (f, t P not JEDEC registered).

Figure 9. Test Circuit for Transient Immunity and

Typical Waveforms.

+5 V

V O

** C L INCLUDES PROBE AND STRAY WIRING CAPACITANCE.

V O

* SEE NOTE 11

R 2 IS NOT USED.

V R 2 >

R 1 <

MIL-PRF-38534 Class H,Class K, and DSCC SMD Test Program

Agilent’s Hi-Rel Optocouplers are in compliance with MIL-PRF-38534 Class H and K. Class H and Class K devices are also in compliance with DSCC drawings 83024, 5962-89785, 5962-89810, and 5962-98002.Testing consists of 100% screen-ing and quality conformance inspection to MIL-PRF-38534.

Figure 11. Operating Circuit for Burn-In and Steady State Life Tests.

* ALL CHANNELS TESTED SIMULTANEOUSLY.

I O = 40 mA

T A = +125 °C

https://www.docsj.com/doc/1f10668454.html, Data subject to change.