ADC的最新进展
ADC Performance Survey 1997-2011
Boris Murmann, Stanford University, murmann@https://www.docsj.com/doc/3e5406552.html,
The purpose of this data collection is to help identify trends and limits in the power efficiency of A/D converters. In an
ideal world, everyone would use the same metrics and conditions to specify the power dissipation, bandwidth and
resolution of their designs. Unfortunately, in this world, different authors use different metrics and interpretations.
Having said this, it is clear that the tabulated data in this document must be read with a grain of salt. Arguably, each
For use in publications and presentations please cite this data collection as follows:
B. Murmann, "ADC Performance Survey 1997-2011," [Online]. Available: https://www.docsj.com/doc/3e5406552.html,/~murmann/adcsurvey
Notes on the primary (raw data) columns:
Power (P) - Taken as specified by the authors. Sometimes this number includes power for clocks, references, etc;
sometimes it doesn't. For delta-sigma modulators, the power for the decimation filter is not included. This is fair
fsnyq - Nyquist sampling rate, equal to the sampling rate (fs) divided by the oversampling ratio (OSR). Note that for
THD, (peak) SNDR, (peak) SNR, SFDR are tabulated as the values measured near fs/2 for a Nyquist converter.
When this data was not available, data for lower input frequencies is used instead. Fortunately, in recent years most
Nyquist converters are properly evaluated up to fs/2. Only older data points (before ~2003) tend to suffer from "low
frequency only" issues. Multi-GHz converters tend to roll off for frequencies much lower than fs/2. For these
DR is the measured "instantaneous dynamic range" of the converter, i.e. this metric does not contain any extra dBs obtained throu Notes on secondary columns:
SNDR_plot - Unfortunately, many oversampling designs specify only DR as a measure of resolution. Therefore, this
columns looks to generate a "best replacement" for SNDR using the smallest value among {SNR, THD, DR, SFDR}
DR_plot - Likewise, many Nyquist ADCs do not specify DR, but for some applications this is a more meaningful
metric than the peak SNDR. Therefore, this columns looks to generate a "best replacement" for DR using either
Power/fsnyq - Energy per Nyquist sample (not to be confused with the metric energy/conversion-step). It is
implicitly assumed here that power scales proportional to the Nyquist sampling rate. This is true fundamentally, but in
practice, it is often harder to build a circuit that pushes speeds to the technological limits. Whenever a data point
BW_plot - The main idea here is to capture how wide of a band the converter can digitize, primarily to argue about
jitter and aperture bandwidth in Nyquist ADCs. The BW is typically clearly defined in oversampling converters. For
Nyquist ADCs, BW_plot is typically taken equal to fsnyq/2 where justified, i.e. the listed SNDR is also measured at
fsnyq/2. Exceptions include designs that roll off below Nyquist (example: ISSCC 2003, paper 18.2., fs=20GHz,
Notes on the "energy" and "aperture" plots:
The general idea is to have one chart where low energy designs can shine (the energy plot) and one where designs
with good speed-resolution product will stand out (the aperture plot); there are usually only very few designs that look
good in both plots. Energy plot: x-axis=SNDR_plot, y-axis=Power/fsnyq. Aperture plot: x-axis=SNDR_plot, y-
axis=BW_plot. In the aperture plot, the lines for Jitter=0.1psrms/1psrms are performance lines that a fictitious
Other notes:
Bandpass delta-sigma converters are generally hard to compare to Nyquist and low-pass delta-sigma modulators.
The metrics used in this data set are no exception and do not provide a fair comparison. Bandpass converters
Some people may argue that for converters with ERBW < fs/2, the power should not be normalized by fsnyq, but
rather by 2*ERBW. I do not subscribe to this argument, because in a typical Nyquist converter, none (or few) of the
active circuits "see" the input frequency; ERBW < fs/2 usually boils down to limitations in a passive portion of the
converter that does not dominate the overall power. Also, calculating a FOM by normalizing to 2*ERBW would
require a change in the noise bandwidth (which is fs/2), for fairness. Yet another group of people may argue that you
I would like to thank Richard Schreier (ADI), Ken Poulton (Agilent), Yangjin Oh, Ray Nguyen, Matthew Guyton (MIT), Hajime Shibata (ADI), Yawei Guo (Cadence), Alp Oguz (EPFL), Matthias Keller (Univ. Freiburg) and Marian Thanks,
Boris
[1] B. Murmann, “Limits on ADC Power Dissipation,” in Analog Circuit Design, by M. Steyaert, A.H.M Roermund,
[2] B. Murmann, "A/D Converter Trends: Power Dissipation, Scaling and Digitally Assisted Architectures," Proc.
[3] R. H. Walden, “Analog-to-digital converter survey and analysis”, IEEE J. Select. Areas Commun., vol. 17, pp. Revisions:
20070907: First web release
20070927: Minor formatting edits
20080207: Update ISSCC 2008
20080627: Update VLSI 2008
20090423: Update ISSCC 2009
20091023: Update VLSI 2009, added FOM lines in Energy plot
20100226: Update ISSCC 2010, corrections of earlier data
20100620: Update VLSI 2010, corrections to earlier data (especially DR), formatting change to explicitly state the 20100620a: Corrections on a few selected data points (in red)
20100620b: Corrections on a few selected data points (in purple)
20110308: Update ISSCC 2011
20110415: Added area data by Marian Verhelst (Intel)
20110620: Update VLSI 2011, some data corrections
urvey.html.
ny extra dBs obtained through variable gain.